Characterization of N+ NN+ Transistor (3N) using 2D ATLAS Simulator

Authors

  • Ranjeet Kumar Verma SHIAT’S Allahabad India Author
  • Anil Kumar SHIAT’S Allahabad India Author
  • A.K. Jaiswal SHIAT’S Allahabad India Author

Keywords:

N+ N N+ transistor (3N), Threshold voltage, Leakage current, Back current, 2D-ATLAS

Abstract

A polysilicon gated N+ N N+ silicon substrate transistor purposed in this paper. Its characteristics demonstrated and compared with conventional N-MOS transistor using 2D-ATLAS simulator. The result shows that 3N transistor has a number of desirable features, such as linear variation of Id with control gate voltage, low leakage current and threshold, effect of different control gate voltage studied and demonstrated in the paper.

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Published

2014-06-30

Issue

Vol.4, No.3 (May/Jun 2014)

Section

Articles

How to Cite

Characterization of N+ NN+ Transistor (3N) using 2D ATLAS Simulator. (2014). International Journal of Current Engineering and Technology, 4(3), 1823-1825. https://ijcet.evegenis.org/index.php/ijcet/article/view/940