Design, Simulation and Power Analysis of Sigma-Delta Modulator using 0.18µm CMOS Technology

Abstract

This paper presents the design technique for a sigma-delta modulator in a standard 0.18μm CMOS technology. This circuitry performs the function of an analog-to-digital converter. A first-order 1-bit sigma-delta (Σ-Δ) modulator is designed, simulated and tested using Cadence 0.18 μm CMOS process technology with power supply of 1.8 V through Cadence. The modulator is proved to be robustness, the high performance in stability .The simulation are compared with those from a traditional analog-to-digital converter to prove that sigma-delta is performing better with low power and area.