Low Complexity Architecture for Max* Operator of Log-MAP Turbo Decoder

Abstract

A new approach for finding the two maximum values from the serial inputs is proposed. The architecture given is a hybrid combination of the two approaches namely: (a) tree-structure approach (b) radix approach, arranged preferably in less complex manner. Since, it is observed that the number of registers used and time delay in the design is comparatively less, it is believed to be less complex architecture known so far. Improvement in the memory consumption has also been noticed in the design. The architecture is intended for use in the iterative decoders like Log Map decoder for max* operation