[1]
“Low power VLSI design approach for 16 bit binary counter to reduce power”, Int. J. Curr. Eng. Technol., vol. 1, no. 1.Special Issue, pp. 344–347, Sep. 2013, Accessed: May 02, 2026. [Online]. Available: https://ijcet.evegenis.org/index.php/ijcet/article/view/3855