Low power VLSI design approach for 16 bit binary counter to reduce power. International Journal of Current Engineering and Technology, [S. l.], v. 1, n. 1.Special Issue, p. 344–347, 2013. Disponível em: https://ijcet.evegenis.org/index.php/ijcet/article/view/3855. Acesso em: 30 apr. 2026.