Optimized Reconfigurable ASIP of FIR Filter using FPGA. International Journal of Current Engineering and Technology, [S. l.], v. 4, n. 3, p. 1499–1502, 2014. Disponível em: https://ijcet.evegenis.org/index.php/ijcet/article/view/737. Acesso em: 6 apr. 2026.